The present invention is related to crystal oscillators and more particularly a method for decreasing the oscillator startup time.
At the present time, a 32,768 Hz clock signal is used in most portable applications using a crystal oscillator. These applications require a crystal oscillator circuit that has high phase noise performance and a low startup time.
Traditional pierce crystal oscillator typically use an Automatic Amplitude Control loop (AAC) to keep the amplitude constant with process and temperature. However, the control loop is always ON and injects noise around clock edges. This means that the AAC noise dominates the phase noise of the pierce crystal oscillator. To increase phase noise performance, typical designs often set the transconductance of a bias transistor larger than the tail current of the amplifier to decrease the noise impact from the bias circuit. However, this will decrease the open loop gain of the AAC that leads to a longer the startup time.
What is desired is a circuit and method to decrease the crystal oscillator startup time while maintaining good phase noise performance.